--- Log opened Срд Окт 11 00:00:01 2006
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01:11 < rem> bye
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02:26 < marcheu> ok, I'm committing the non-working context switching stuff
02:27 < marcheu> and hopefully going to bed soon too
02:29 < jkolb> marcheu: cool
02:34 < marcheu> ok, done. I hope this wont break too much stuff
02:34 < marcheu> we can always revert anyway :)
02:35 < marcheu> also, there are a number of FIXMEs in the drm where I'm not sure
02:35 < marcheu> well, this is mostly empirical, but I marked the worst things with FIXMEs :)
02:35 < jkolb> where does it break? do we need the binary blob loaded first and then removed?
02:36 < marcheu> no
02:36 < marcheu> it breaks on server exit for me, but I think it's an older bug that surfaced
02:36 < marcheu> more precisely
02:36 < marcheu> it breaks on server exit when there's screen activity going on
02:38 < marcheu> again, I think that's an old bug, since it was experienced by titou on his ia64
02:38 < marcheu> _before_ my commit
02:38 < jkolb> ahh ok
03:00 < jkolb> i don't see the drm commit...
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20:24 < marcheu> jkolb: FYI, drm commits don't appear on the commits list since the nouveau drm resides in a branch of the official drm, and I don't think it's possible to catch those specific ones
20:25 < darktama> it'd be nice to be able to catch them though, especially if we end up being a branch off Mesa git (when it moves from cvs, that is)..
20:26 < marcheu> darktama: any idea what shoudl go in RAMFC_DMA_METHOD ?
20:27 < marcheu> I actually think I got that part pretty much totally wrong
20:27 < marcheu> nv04 looks totally different from nv04 on that front
20:28 < darktama> not really.. I figured it'd be set by the gpu to say what was last executed, or what will be executed when the GPU switches back to that channel
20:28 < marcheu> yeah, putting 0 here, hoping for the best
20:28 < darktama> not sure which, or even if that's remotely correct though..
20:30 < darktama> marcheu: that last commit, I'm fairly sure CACHE1_{METHOD,DATA} is filled from the user fifos
20:30 < darktama> I have no idea what CACHE0 is at all
20:30 < marcheu> well, CACHE1 seems to be the MMIO cachen and CACHE1 the FIFO cache
20:30 < marcheu> hmm
20:31 < marcheu> well, CACHE0 seems to be the MMIO cachen and CACHE1 the FIFO cache
20:31 < darktama> ahh, I see
20:31 < jkolb> marcheu: yeah i figured that out after ;)
20:31 < marcheu> when working on the fifo, the code touches only CACHE1
20:31 < darktama> yup
20:33 < marcheu> so, fifo context is 128 bytes for your nv40 too ?
20:33 < darktama> yes, assuming that *was* RAMFC
20:33 < marcheu> it's only 32 bytes on nv04 (yet another reason the current code won't work)
20:33 < marcheu> or maybe nvosdk is just buggy
20:34 < darktama> do you have nv04 hardware at all?
20:34 < marcheu> heh, yes :)
20:34 < marcheu> nv04 and nv05 are similar anyway
20:34 < marcheu> nv05 is really just a bugfixed nv04 :)
20:34 < darktama> ah cool.. I was thinking I was going to have to rip my nv04 out of my server :P
20:35 < marcheu> well, you probably have a m64 ?
20:35 < darktama> yup
20:35 < darktama> oops, nv5
20:35 < marcheu> yup
20:35 < marcheu> I have a couple of real NV4s here (these are TNT1)
20:36 < marcheu> hmm, that list of card is incomplete..
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--- Log closed Чтв Окт 12 00:00:01 2006
