--- Log opened Пнд Авг 07 00:00:08 2006
00:10 < KoalaBR> Ok, I will add the doc file if I get access later and will report back on tuesday earliest
00:10 < KoalaBR> Godd night
00:10 < KoalaBR> Good
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00:28 < pmdata> http://download.nvidia.com/developer/Papers/2005/Fast_Texture_Transfers/Fast_Texture_Transfers.pdf interesting
00:29 < pmdata> they talk about 'swizzling' texture
00:32 < pmdata> native nvidia texture format is bgra, when reading rgba, the gpu has to 'swizzle' it to bgra format
00:42 < marcheu> yes, same for glread/drawpixels
00:42 < marcheu> all video cards that I know of operate in BGRA natively
00:45 < pmdata> argb in big endian :)
00:45 < marcheu> yeah, which makes big endian archs sometimes more convenient
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00:45 < marcheu> Unbeliever: http://en.wikipedia.org/wiki/Comparison_of_NVIDIA_Graphics_Processing_Units
00:46 < pmdata> anyway, I should really add a function to test texture formats
00:48 < pmdata> marcheu> the bitfields we find in renouveau are little endian
00:49 < pmdata> or not?
00:49 < marcheu> which ones ?
00:49 < pmdata> all
00:49 < marcheu> I'm not sure if I understand your question
00:50 < pmdata> I just wanted to know if the dumps (and so the stuff we put in renouveau) are little/big/independent of endianness
00:50 < marcheu> yea, they're endian-dependent
00:51 < marcheu> everything is sent as 32 bit ints
00:51 < marcheu> we don't write separate bytes
00:51 < marcheu> for register writes that is
00:51 < marcheu> other data might be problematic
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00:58 < Duke`> why do they operate with BGR internally and not RGB? also I heard sometines that it was faster than RGB, but maybe only at texture creation (pixel data upload faster without the swizzling?)
01:13 < marcheu> no idea. it's just that most cards are like that
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01:56 < marcheu> well, maybe it's because of the old convention that data on a bus travels in big endian...
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04:41 < darktama> marcheu: yup, that would indeed be useful
04:41 < marcheu> darktama: ?
04:42 < darktama> <marcheu> darktama, pmdata: so, would that be useful if I put my nv28 "online" ?
04:42 < marcheu> ah, ok
04:42 < marcheu> I'll see about doing that then
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09:13 < darktama> hmm, interesting.. NV10_SCALED_IMAGE_FROM_MEMORY 0x184 has a handle for a 0x9e object.. I guess that's how it knows where to put the scaled image
09:43 < marcheu> hmm
09:44 < darktama> it's interesting because most objects point at DMA objects for in/out.. not at other context objects
09:44 < marcheu> 9e has been called NV20_SWIZZLED_SURFACE already
09:45 < darktama> oh.. oops, I did search.. not properly obviously :)
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09:51 < marcheu> I actually wonder if it works on nv10 too
09:52 < darktama> do we have dumps of test_tex() for nv10?  that should show it being used
09:54 < marcheu> yeah, but it's not used there. maybe that's because the dumps are too old
09:54 < marcheu> btw the dumps url is in the topic :)
09:54 < marcheu> (and you're allowed to fill it as well)
09:54 < darktama> yup, the nv11 dump I just checked had nothing for the test_tex() and texture3d test
09:54 < marcheu> check the nv15gl ones
09:55 < marcheu> they use the NV04 variant
09:57 < darktama> hmm, I guess if nvidia don't use it we'll need to wait until we can throw commands at the gpu to test it on nv10
09:58 < marcheu> I suppose NPOT could trigger it...
10:00 < darktama> it's possible.. might be worth noting that nvidia assign the same handle to it though, that might suggest it's not supported
10:04 < darktama> btw, have you noticed that regs+0x00C00000 also have FIFO control regs?
10:04 < darktama> they seem to mirror the ones at 0x0080000
10:04 < darktama> 0x00800000*
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10:06 < marcheu> hmm, I noticed a number of copies of the fifo regs yeah
10:26 < darktama> marcheu: what's the path to the /tests folder at nouveau.sf.net?
10:28 < darktama> nvm, found it
10:29 < darktama> hmm, I don't seem to have write access to the tests folder
10:30 < darktama> rwxr-xr-x marcheu:nouveau
10:30 < marcheu> I thought I fixed that already
10:31 < marcheu> that's ok now
10:31 < marcheu> it must have been fixed at some point, because lumag put some files successfully
10:31 < marcheu> maybe my rsyncing breaks it
10:32 < darktama> hmm, no idea.. the only contact I have with rsync is when I type "emerge --sync" :)
10:33 < darktama> but, it's working now
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11:45 < qfire> I ran all the renouveau tests on a g71, if anyone is interested, or want to add it to the sourceforge site: http://qfire.net/nv/dumps
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14:02 < marcheu> qfire: I can add you to the sf.net devs if you want
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14:44 < EdB> yeah no a renouveau subject but http://lists.duskglow.com/open-graphics/2006-August/006989.html
14:44 < EdB> if some have free time :o)
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17:13 < darktama> qfire: how much vram on that g71?
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18:45 < Lumag> hi all
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19:06 < darktama> hey Lumag 
19:07 < darktama> how goes your work on context switching?
19:07 < Lumag> no luck :(
19:07 < marcheu> the irq code doesn't help ?
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20:12 < qfire> darktama: 256M of DDR3
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21:13 < pmdata> hello
21:15 < Duke`> hi
21:15 < pmdata> finally found that nvidia doc about texture formats supported by each chip
21:15 < pmdata> http://developer.nvidia.com/object/nv_ogl_texture_formats.html
21:16 < pmdata> time to write a texture_format test then
21:26 < pmdata> ah, this test_startup() is a good thing, I also see unknown quadro stuff I put in nv_objects.h
21:36 < marcheu> pmdata: very interesting
21:37 < pmdata> startup or texture_format?
21:37 < marcheu> texture_format
21:37 < marcheu> I was already convinced that test_startup was a good thing :)
21:37 < marcheu> there are only good things in here anyway
21:39 < marcheu> Lumag: so, the irq handler doesn't work ? is it even called ?
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21:57 < pmdata> ouh, there are many unknown people there
21:58 < marcheu> mostly nvidia people spying on us in order to learn how to write a driver
22:00 < pmdata> qfire> could you try making a test_default() dump using a stereo buffer?
22:02 < stringfellow> I'm not an nvidia person, just a winehacker :-)
22:02 < EdB> marcheu, :o)
22:03 < EdB> may be they have lose there spec and need info on reverse :o)
22:03 < pmdata> stringfellow> wine is getting better and better
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22:03 < stringfellow> we do try :-)
22:04 < pmdata> this is nice, because there was much pr about transgaming' cider, and I think it don't deserve public interest
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22:11 < marcheu> EdB: actually, I think they could potentially use our tools to debug their own driver. like checking that what they expect is written to the fifo :)
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22:11 < pmdata> they could even use renouveau as their chip doc
22:12 < marcheu> yeah, and they can even say "here are the specs for you people ! see how nice we are"
22:12 < marcheu> "we help the open source world !"
22:12 < EdB> :þ
22:12 < marcheu> anyway, back to building that nv28-box
22:14 < EdB> i've post this this morring but don't who show it. related to OpenGraphic http://lists.duskglow.com/open-graphics/2006-August/006989.html
22:15 < marcheu> yeah, I've seen it on #xorg-devel as well
22:15 < EdB> ok
22:15 < pmdata> seen it on the lumag'slog
22:15 < philv> They actually produced something?
22:15 < EdB> philv, on the way to product a FGPA board
22:15 < marcheu> philv: yeah, something g200-grade I'd say
22:15 < pmdata> I saw they need to register some vendor id from pcisig (cost some bucks)
22:15 < philv> I thought it was just a Spartan3 on a PCI board at this point
22:16 < philv> marcheu: impressive
22:16 < marcheu> philv: if it actually works, it is
22:16 < philv> I would have thought you'd run out of multipliers too quickly with an S3
22:16 < philv> marcheu: I'm very curious, because I know people have been making noise about it for ages now.
22:16 < marcheu> anyway I don't know much about FPGA programming
22:17 < marcheu> well, I think following both tracks (open hw and RE'd drivers) at once makes sense
22:17 < philv> I just don't think an FPGA has the resources, even comparing to even earlier nVidia and ATI
22:17 < philv> marcheu: indeed, I agree.
22:18 < EdB> philv, they don't want to fight nVidia or Ati for now
22:19 < philv> Heh, understandable
22:19 < philv> The market is about to hit a really big upheaval anyways... it shall be interesting
22:20 < marcheu> alright, lets see if the nv28 box works
22:26 < philv> Uggh, I'm reading the spec for OpenGraphics... I think their expectations are extremely unrealistic given the platform they chose
22:31 < marcheu> how fast can that chip be reprogrammed ?
22:31 < marcheu> because a programmable chip would be a killer with shader stuff, you could have it in hw directly
22:31 < philv> You can't reprogram it on the fly
22:31  * marcheu is so disappointed
22:31 < philv> The Virtex4s support reprogrammable blocks
22:32 < philv> V5s do too
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23:03 < marcheu> ok, the nv28 box is ready
23:03 < marcheu> pmdata, darktama: ping !
23:05 < marcheu> will eat a piece, bbl
23:09 < qfire> pmdata: not sure if this is what you wanted, but I set the SDL_GL_STEREO attribute to 1 and ran test_default:
23:10 < qfire> http://qfire.net/nv/dumps/g71/card_10de-0291_test_default_stereo.txt
23:10 < qfire> hmm.. should have looked at the dump before I bothered to post it :)
23:12 < pmdata> check glxinfo, the 'stro' column
23:12 < pmdata> you should have some 'y' for some visual
23:17 < Duke`> the final OGP card won't be with FPGA but an ASIC. FPGA version is for developpers only
23:18 < qfire> odd, no visual that supports stereao
23:19 < qfire> http://qfire.net/nv/dumps/g71/glxinfo.txt
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23:22 < pmdata> damn, maybe only enabled on quadro cards
23:22 < pmdata> when reading your dumps, I see 2 extra buffers setup (offset, pitch) with same value as color buffer
23:25 < qfire> I take it that's not common to see?
23:25 < pmdata> I did not see that on nv20 dumps
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23:29 < pmdata> nvidia says quadbuffered stereo only for quadro, don't know about other stereo modes
23:30 < qfire> this is probably an obvious question, but what is "pitch" referring to?
23:31 < pmdata> number of bytes of a buffer line
23:31 < qfire> ah, thx
23:31 < pmdata> mostly screen_width * sizeof(pixel_format), modulo some rounding
23:33 < pmdata> do you have 2 monitors?
23:34 < qfire> no, but the adapter supports 2 monitors.
23:34 < pmdata> then maybe stereo context is only possible when you have 2 monitors
23:35 < pmdata> check also does it does not need some flag in x11 server config
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23:35 < qfire> ok, I'll look into that
23:37 < pmdata> http://download.nvidia.com/XFree86/Linux-x86/1.0-8762/README/appendix-d.html
23:37 < pmdata> option "stereo" <integer>
23:38 < pmdata> "Stereo is only available on Quadro cards" :-(
23:38 < pmdata> even if the hw supports it
23:39 < pmdata> and it seems it requires 2 video output display (glasses, or 2 monitors)
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23:40 < Unbeliever> pmdata: how can i know which commands are discovered and wich not?
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23:48 < qfire> just tried changing it anyways by telling the driver two CRT's were connected and setting stereo 4, but no difference :(
23:51 < pmdata> I don't know if you can use nvclock to turn it into a quadro
--- Log closed Втр Авг 08 00:00:08 2006
